Prerequisite paging multilevel paging is a paging scheme which consist of two or more levels of page tables in a hierarchical manner.
Two level page table scheme.
Page tables caches and tlbs page tables suppose that we have a two level page translation scheme with 4k byte pages and 4 byte page table entries.
Of pages of the page table 2 outer page table 2 22 2 12 2 10 pages.
If so we could repeat this process by paging the top level page table thus introducing another layer of page table.
So size of outer page table 2 10 4b 4kb.
The entries of the level 1 page table are pointers to a level 2 page table and entries of the level 2 page tables are pointers to a level 3 page table and so on.
Outer page table 2 is required to keep track of the frames storing the pages of outer page table 1.
4 kilobytes 2 12 bytes which means we need 12 bits to address a specific byte within the page.
Even two level paging scheme not sufficient if page size is 4 kb 212 then page table has 252 entries if two level scheme inner page tables could be 210 4 byte entries address would look like outer page table has 242 entries or 244 bytes one solution is to add a 2nd outer page table.
Consider a two level paging scheme.
The page size is 4 kb and page table entry size is 4 bytes.
Thus we can stop here.
Finding data with hierarchical paging.
With different numbers we could have a very large top level page table.
This is two level paging because here we got 2 page tables.
Thus here our outer page table page table 2 can be stored in one frame.
To look up an address in a hierarchical paging scheme we use the first 10 bits to index into the top level page.
One for each block of 2nd level page table.
Roughly sketch out the format of a complete page table.
The size of outer page table is 4 kb.
The page table is a key component of virtual address.
It is also known as hierarchical paging.
A page table is the data structure used by a virtual memory system in a computer operating system to store the mapping between virtual addresses and physical addresses virtual addresses are used by the program executed by the accessing process while physical addresses are used by the hardware or more specifically by the ram subsystem.